So the design as it stands today is sitting in the FPGA but alas.. it doesn't seem to be executing the same as the original hardware. As I dug further... I spotted some memory location reads that didn't line up. Turns out.. those are to the security ROM located at 4K for Pole Position 2 which of course, doesn't exist in my design. (Duh!)
I know there are hacked romsets out there that bypass it (replace jump instructions with NOPs), but I'd rather handle it in hardware. That way, when people ultimately use this thing, they can just grab authentic PP and PP2 romsets off the web, toss it on here and it will just plain work. Rather than spend too much time on this just yet, I've decided to switch to the PP romset for FPGA implementation. Once that's all set I'll reverse engineer the IC25 for PP2 and re-veify that PP2 works as well.