Wednesday, December 12, 2012

Time to call in the Austrians

So it looks like the Z80 and both Z8002's initialize and pass all memory checks and the Z80 is at the point in the code where it is looking for some status from the 06xx. Now the 06xx is basically a customs controller and it has the ability to control up to 4 separate Namco 5XXX series devices.  As it stands.. Pole Position actually has 4 of these: 51xx, 52xx, 53xx and a 54xx
So this means I have to now reverse engineer 5 more Namco customs. Or do I?

Calling in a favor from my buddy Wolfgang, who has been working in parallel on an FPGA implementation of the Galaga system.  He and I have been sharing the code for our customs for a while and I'm happy to see that he has already done quite a bit of this work:


Tuesday, December 4, 2012


So the design as it stands today is sitting in the FPGA but alas.. it doesn't seem to be executing the same as the original hardware. As I dug further... I spotted some memory location reads that didn't line up. Turns out.. those are to the security ROM located at 4K for Pole Position 2 which of course, doesn't exist in my design.   (Duh!)

I know there are hacked romsets out there that bypass it (replace jump instructions with NOPs), but I'd rather handle it in hardware. That way, when people ultimately use this thing, they can just grab authentic PP and PP2 romsets off the web, toss it on here and it will just plain work.  Rather than spend too much time on this just yet, I've decided to switch to the PP romset for FPGA implementation. Once that's all set I'll reverse engineer the IC25 for PP2 and re-veify that PP2 works as well.

Thursday, October 25, 2012

09xx cracked!

Fwew.. what a pain. That larger CPLD had tons of space but due to those longer wires there was quite a bit of noise that made it tricky to clean up.  After weeks of working on this guy I was finally able to get it working.

That's it for the CPU/Video related customs which means I can start preparing the RTL for the FPGA development platform. Stay tuned for those updates.. I hope to start a video series that captures the progress from here on out.

Thursday, June 28, 2012

June 2012 Status...

Making a lot of headway on the hardware design.  I have all of the CPU and Video PCB logic coded up in verilog (with the exception of the sound stuff) and simulating. The Z80 and Z8002's are working (in far) but its becoming apparent to me that I'm gonna have to toss this thing into a devkit soon to iron out the bugs. It literally takes hours of simulation time just to get the system out of reset, which happens in a matter of seconds on the actual hardware.

On another note I've started work on the 09xx series custom. I tried programming it into my FpgaArcade device but alas.. it was too small. Time to bring out the big gunz!